The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> High-Speed I/O Design >> State-of-the-art speed for high-speed electrical channel
https://designers-guide.org/forum/YaBB.pl?num=1516022878

Message started by aguntuk on Jan 15^th, 2018, 5:27am

Title: State-of-the-art speed for high-speed electrical channel
Post by aguntuk on Jan 15^th, 2018, 5:27am

Hi,
I want to know about the state-of-the-art speed or the highest speed possible so far for the high-speed electrical channel (not optical links) which includes SERDES, etc.

I know about PCIe 3 and PCI5 is coming probably in 2019. Any other peripheral interconnects or channel from other companies (Xilinx, IBM..) which is the highest and implemented or in research level? I want to know which channels are among the highest speed which are implemented. Your help will be much appreciated...

Title: Re: State-of-the-art speed for high-speed electrical channel
Post by repah on Apr 17^th, 2018, 2:44pm

Read these two papers:

Historical Trends in Wireline Communications: 60? Improvement in Speed in 20 Years, Behzad Razavi

Looking to the Future: Projected Requirements for Wireline Communications Technology, Hirotaka Tamura