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Simulators >> Circuit Simulators >> Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
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Message started by MehdiOranji on Nov 13th, 2017, 8:40pm

Title: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by MehdiOranji on Nov 13th, 2017, 8:40pm

Hello,

I want to simulate a continuous time sigma delta modulator SNDR with Monte-Carlo simulation in Cadence and see the histogram of the SNDR so as to figure out how the device mismatches impact the modulator performance. I have the output bit stream of the modulator quantizer, I have no idea how to fed the output to the monte-carlo simulation and end-up with the histogram showing "#counts vs. SNDR". I would appreciate it if someone let me know how to do that.

Regards,
Mehdi

Title: Re: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by sheldon on Nov 14th, 2017, 10:49am

Mehdi,

Steps
1) Setup your test bench to run the Delta-Sigma SNDR simulation
2) Use the ViVA measurements: SINAD
3) Save the SINAD results to the ADE outputs
4) Run Monte Carlo, in Explorer or Assembler
5) Plot the Histogram when done
6) Use Contribution Analysis to analyze mismatch
   See my blogs on the Cadence Community site

The output of the Delta-Sigma modulator is a PWM signal, you
can perform an FFT on it and get spectrum.

                                                                 Sheldon



Title: Re: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by MehdiOranji on Nov 14th, 2017, 11:16am

Thanks Sheldon for your kindly response. The problem is that I am using Cadence 5.10.41 which does not have the viva calculator and the explorer. Do you have any idea how I can do the job in Cadence 5.


Title: Re: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by sheldon on Nov 14th, 2017, 5:25pm

Mehdi,

    The calculator has a dft and can be used to create a spectrum.
You will need to write a Skill function to calculate the SNDR.

                                                                     Sheldon

Title: Re: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by MehdiOranji on Nov 14th, 2017, 5:48pm

I have no idea about the SKILL function. Where should I write the function and load and How I can use its output. Even If you have a sample program, I would appreciate it.

Thanks,
Mehdi

Title: Re: Sigma Delta Modulator SNDR with Monte-Carlo Simulation in Cadence
Post by polyam on Nov 20th, 2017, 8:34pm

Hi Mehdi,

I have two questions for you?
1- Mismatch analysis of what block you are interested in?
2- Are you going to do an MC analysis for a fully transistor level delta sigma?

tnx  






MehdiOranji wrote on Nov 13th, 2017, 8:40pm:
Hello,

I want to simulate a continuous time sigma delta modulator SNDR with Monte-Carlo simulation in Cadence and see the histogram of the SNDR so as to figure out how the device mismatches impact the modulator performance. I have the output bit stream of the modulator quantizer, I have no idea how to fed the output to the monte-carlo simulation and end-up with the histogram showing "#counts vs. SNDR". I would appreciate it if someone let me know how to do that.

Regards,
Mehdi


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