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Design >> RF Design >> CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
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Message started by deba on Nov 9th, 2016, 4:44am

Title: CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
Post by deba on Nov 9th, 2016, 4:44am

Hi All,

For ring oscillators, it is known that by tuning the pMOS/nMOS ratio one can get a symmetric waveform. Resulting in minimizing the phase noise and 1/f^3.

1) Does the same phenomenon happen for CMOS LC VCOs?
2) And if it happens, is it applicable in both current and voltage limited regions of operation of VCO?

Title: Re: CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
Post by tzg6sa on Nov 30th, 2016, 11:02am

1) How does the waveform of an LC VCO looks like? This will answer your question.
2) What do you mean by current and voltage limiting? There is amplitude limiting usually due to a finite supply. I do not think in current and voltage limited regions.

Title: Re: CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
Post by deba on Dec 7th, 2016, 5:02pm

Hi

Can you elaborate on the point "how does the waveform looks like"?

In current limited regime, the swings are proportional to the tail current. In voltage or supply limited regime, the max voltage swing is supply Vdd.

Title: Re: CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
Post by sarge on Dec 14th, 2016, 4:15pm


deba wrote on Dec 7th, 2016, 5:02pm:
Hi

Can you elaborate on the point "how does the waveform looks like"?

In current limited regime, the swings are proportional to the tail current. In voltage or supply limited regime, the max voltage swing is supply Vdd.


Hi,

I think the point here is that LC VCO has sinewave waveforms, and ring has CMOS.
Sorry for interrupting your conversation :)

Title: Re: CMOS LC VCO phase noise sensitivity to pMOS/nMOS ratio
Post by tzg6sa on Jan 9th, 2017, 2:13am

Exactly. A meaninful LC VCO has a high enough Q to suppress the higher order harmonics. So it is a fruitful approach to consider its waveform sinusoidal.

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