sheldon
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Vivek,
There is an app note that includes a detailed discussion of dc mismatch and information on how to derive mismatch models. Some clarifications:
1) You can think of dc mismatch analysis as the equivalent of corner analysis for device mismatch. It introduces a 3-sigma mismatch between matched devices and allows designers to determine whether the design passes or fails with mismatch.
2) DC mismatch reports the effect of the device mismatch, for example, the offset voltage of the device.
3) In addition, it reports the "root cause" of the problem so that designers can improve the design. This is the purpose of the sensitivity outputs. The report also includes some insight into the source of the mismatch, for example, Vt, Beta, ...
--> Information is helpful in understanding how to improve the design.
4) The "threshold" parameter is used to allow designers to ignore pairs that don't make a big contribrution to the output. This is helpful when analyzing large designs.
5) Designers do not vary the parameters, models including dc mismatch need to be provided by the foundry. In the app note there is a description of how to derive the required model parameters.
6) You can save the dc operating and use it with the small signal analysis. So you can calculate the effect of mismatch on common-mode rejection and power supply rejection.
DC mismatch analysis is being actively enhanced. Recently gummel-poon bipolars and the EKV model were added to the analysis.
DC mismatch is also very useful for verification and synthesis.
Best Regards,
Scheldon
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