The Designer's Guide to Verilog-AMS starts in Chapter 1 with a brief introduction to hardware description languages in general and Verilog-AMS in particular.
Chapter 2 presents a formal top-down design methodology. While not used extensively today, top-down design is widely believed to be the only methodology available that can efficiently handle large complex mixed-signal designs. This chapter presents a refined and proven top-down methodology that overcomes many of the problems with existing top-down methodologies.
Chapter 3 and Chapter 4 introduce the Verilog-A and Verilog-AMS languages. The important concepts of the languages are presented using practical and easy to understand examples. These chapters are intended to be read from beginning to end and are designed to take engineers with a working knowledge of programming concepts to the point where they are comfortable writing a wide range of Verilog-A and Verilog-AMS models. However, they do not cover all the details of the languages.
Chapter 5 is a reference guide to the languages. It presents all of the details, but not in a completely linear fashion. Though it can be read from beginning to end, it was written with the expectation that most would use it as a reference, looking up just the details they need when they need them. As such, it, as with the rest of the book, is extensively cross referenced and indexed.
Appendix A covers some of the practical details of using Verilog-A or Verilog-AMS with several available simulators.
The most recent versions of the examples used in the book are available for download below. All Verilog-A models have been tested with Spectre. All Verilog-AMS models have been tested with AMS Designer.
ISBN 1-4020-8044-1 (hardbound)
ISBN 1-4020-8045-X (eBook)
Library of Congress Call Number TK7874 .K856 2004